In an asynchronous switching power supply, typically, as shown in FIG. 1, a power switch M1 and a diode D1 are serially connected between a voltage input terminal Vin and a ground terminal GND, an inductor L is connected between a switch node 14 and a voltage output terminal Vo, a capacitor Co is connected between the voltage output terminal Vo and the ground terminal GND, a driver 12 generates a control signal S1 according to a pulse width modulation (PWM) signal provided by a PWM controller 10 to switch the power switch M1 to convert an input voltage Vin to an output voltage Vo, and the supplied driver voltage Vcc of the driver 12 determines the voltage level of the control signal S1. In light loading operation, the switching power supply will have low power efficiency due to switching loss. If the switching frequency of the power switch M1 is f, then the switching loss will bePLoss=f×Cin×Vcc2.  [Eq-1]where Cin is the equivalent capacitance at the gate of the power switch M1. According to the equation Eq-1, lower driver voltage Vcc results in less switching loss PLoss. FIG. 2 is a diagram showing the power efficiency to loading of the circuit of FIG. 1 under different driver voltages Vcc, in which curve 16 depicts the power efficiency under the driver voltage Vcc of 6 V, and curve 18 depicts the power efficiency under the driver voltage Vcc of 12 V. FIG. 2 clearly shows that at light loading, the switching power supply under the driver voltage Vcc of 6 V will have higher efficiency than under the driver voltage Vcc of 12 V.
In order to reduce the switching loss of a switching power supply at light loading, there have been proposed many circuits for providing adjustable driver voltage Vcc of a driver. For example, FIG. 3 is a block diagram of the Intersil's driver chip 20 with product no. ISL6622, which uses a linear regulator 22 to provide a driver voltage LVCC to a low-side driver 26, and the linear regulator 22 changes the driver voltage LVCC according to an external signal GD_SEL and thus may provide lower driver voltage LVCC at light loading to improve the power efficiency. However, the driver chip 20 requires two power supplies LVCC and UVCC to provide the driver voltages for a high-side driver 24 and the low-side driver 26, respectively, so that the circuit is complicated. U.S. Pat. No. 7,345,463 proposes a method for providing an adjustable driver voltage for a single chip, which changes the driver voltage supplied to a driver by detecting the load current of a power supply, and may even optimize the driver voltage by use of the load current, the input voltage, the output voltage and the characteristic parameters of the power switch. However, this method requires more complicated circuit.